Logic Synthesis in VHDL

1. In electronics, logic synthesis is the process by which an abstract form of desired circuit behaviour, typically at RTL level, is turned into a design implementation in terms of logic gates, typically by a computer program called a synthesis tool.

2. The synthesized logic is optimized in terms of area (number of gates) and/or speed (number of gate levels).

3. A synthesizer requires two inputs: the design description file and the specification of the target PLD.

4. A synthesizer generates the required Boolean equations. It automatically carries out logic and state minimization and stores the simplified Boolean equations in an intermediate form. The output of the synthesizer is a gate-level logic description.

5. Typically, a synthesizer performs three steps during synthesis:

  1. Language synthesis: the design description is transformed into a representation based on Boolean equations. These equations represent the interconnection of generic logic elements or functional blocks.
  2. Optimization: algorithms apply the rules of Boolean algebra to optimize the logic for area and/or speed. These optimizations are independent of the technology of the target PLD and produce a technology independent gate-level netlist.
  3. Technology mapping: the logic is mapped to the target PLD using techniques specific to the target PLD’s architecture and further optimizations are performed. This step corresponds to transforming the technology independent netlist to a technology dependent netlist.

6. The performance of a synthesized circuit can be assessed by physically constructing the circuit and testing it. But, its behaviour can also be evaluated by means of simulation.

7. LOGIC SYNTHESIS USING VHDL:

  1. Firstly, VHDL program is input to a synthesis compiler, which generates a lower level description of the circuit as an output.
  2. In this step, a set of logical expressions are produced which describes the logic functions required to realise the circuit.
  3. Now the logical expressions produced by the synthesis tool are not likely in the optimal form.
  4. So the synthesis tool automatically manipulates the user’s design to produce an equivalent but better circuit. This step of synthesis process is called ‘logic synthesis’.
  5. Lastly, it is determined that how the circuit will be realised in a specific hardware technology.
  6. Thus we can say that logic synthesis produces a database with instructions on how to fabricate a physical piece of digital hardware. It consists of that part of a digital system design that can be automated with computer software.

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