Channel Length Modulation in MOSFET (VLSI Design)


  • IDS = current from drain to source OR drain-source current
  • VDS = drain to source voltage
  • L = length of the channel

Now for the ideal case, in the saturation region, IDS becomes independent of VDS i.e. in the saturation region channel is pinched off at the drain end and a further increase in VDS has no effect on the channel’s shape.

But in practice increase in VDS does affect the channel. In the saturation region, when VDS increases, the channel pinch-off point is moved slightly away from the drain, towards the source as the drain electron field “pushes” it back. The reverse bias depletion region widens and the effective channel length decreases by an amount of ∆L for an increase in VDS.

Thus the channel no longer “touches” the drain and acquires an asymmetrical shape that is thinner at the drain end. This phenomenon is known as channel length modulation.

Channel length modulation in mosfet

Thus channel length modulation can be defined as the change or reduction in length of the channel (L) due to increase in the drain to source voltage (VDS) in the saturation region.

In large devices, this effect is negligible but for shorter devices ∆L/L becomes important. Also in the saturation region due to channel length modulation, IDS increases with increase in VDS and also increases with the decrease in channel length L.

The voltage-current curve is no longer flat in this region.

The drain current with channel length modulation is given by:

\boxed{I_{DS} = I_{D} = I_{Dsat}(1+\lambda V_{DS})}


channel length modulation derivation

To account for the dependence of ID on VDS in the saturation region, replace L by L – ∆L. We know that in the saturation region, drain to source current (IDS = ID) is given by:

{I_{D} = \frac{kW}{2L}(V_{GS} - V_{t})^{2}}

{I_{D} = \left(\frac{k}{2}\right)\left(\frac{W}{L-\triangle L}\right)(V_{GS} - V_{t})^{2}}

{I_{D} = \left(\frac{k}{2L}\right)\left(\frac{W}{1- \frac{\triangle L}{L}}\right)(V_{GS} - V_{t})^{2}}

Assuming {\frac{\triangle L}{L} < 1}

{I_{D} =\left(\frac{kW}{2L}\right)\left({1+\frac{\triangle L}{L}}\right)(V_{GS} - V_{t})^{2}}

Since ∆L increases with increase in VDS

{\triangle L\propto V_{DS}}


{\triangle L= \lambda^{'} V_{DS}}

where, {\lambda^{'}} = process technology parameter with unit μm/V.

{I_{D}=\left(\frac{kW}{2L}\right)\left({1+\frac{\lambda^{'}V_{DS}}{L}}\right)(V_{GS} - V_{t})^{2}}


\boxed{I_{DS} = I_{D} = I_{Dsat}(1+\lambda V_{DS})}


{\frac{\lambda^{'}}{L} = \lambda} = process technology parameter with unit V-1

{I_{Dsat}=\left(\frac{kW}{2L}\right)(V_{GS} - V_{t})^{2}}

1 thought on “Channel Length Modulation in MOSFET (VLSI Design)”

  1. sir i still don”t understand when it said that channel length modulation occurs when vds is higher than vgs, so what is the function of high voltage vds capability shown in the datasheet i.e. 600v it is about 10 times bigger than the vgs if the vgs is 15v?

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